ACER, INC.
==========

   EISA 486LXE (MODEL L433S)

   Processor          80486SX/80487SX/80486DX/ODP486SX/80486DX2   
   Processor Speed    25/33/50(internal)/50/66(internal)MHz       
   Chip Set           SIS                                         
   Max. Onboard DRAM  128MB                                       
   SRAM Cache         128/256KB                                   
   BIOS               Acer                                        
   Dimensions         220mm x 260mm                               
   I/O Options        32-bit VESA card slot                       
   NPU Options        4167                                        

<gopher://bitreich.org/I/th99/m/A-B/31272-1.png>
   

   +------------------------------------------------------------+
   |                        CONNECTIONS                         |
   |------------------------------------------------------------|
   | Purpose           | Location | Purpose          | Location |
   |-------------------+----------+------------------+----------|
   | Power LED &       | CN4/1 -  | Turbo switch     | CN4/15 - |
   | keylock           |    5     |                  |    17    |
   |-------------------+----------+------------------+----------|
   | Speaker           | CN4/7 -  | Reset switch     | CN4/19 & |
   |                   |    10    |                  |    20    |
   |-------------------+----------+------------------+----------|
   | Turbo LED         | CN4/12 & | 32-bit VESA card |    S1    |
   |                   |    13    |                  |          |
   +------------------------------------------------------------+

   +------------------------------------------------------------+
   |                 USER CONFIGURABLE SETTINGS                 |
   |------------------------------------------------------------|
   |             Function              | Jumper |   Position    |
   |-----------------------------------+--------+---------------|
   |>> | VESA bus wait states select 0 |  JP8   |  pins 2 & 3   |
   |   |                               |        |    closed     |
   |---+-------------------------------+--------+---------------|
   |   | VESA bus wait states select 1 |  JP8   |  pins 1 & 2   |
   |   |                               |        |    closed     |
   +------------------------------------------------------------+

   +------------------------------------------------------------+
   |                     DRAM CONFIGURATION                     |
   |------------------------------------------------------------|
   |   Size    |         Bank 0         |        Bank 1         |
   |-----------+------------------------+-----------------------|
   |    1MB    |      (4) 256K x 9      |         NONE          |
   |-----------+------------------------+-----------------------|
   |    2MB    |      (4) 256K x 9      |     (4) 256K x 9      |
   |-----------+------------------------+-----------------------|
   |    4MB    |       (4) 1M x 9       |         NONE          |
   |-----------+------------------------+-----------------------|
   |    5MB    |      (4) 256K x 9      |      (4) 1M x 9       |
   |-----------+------------------------+-----------------------|
   |    8MB    |       (4) 1M x 9       |      (4) 1M x 9       |
   |-----------+------------------------+-----------------------|
   |   16MB    |       (4) 4M x 9       |         NONE          |
   |-----------+------------------------+-----------------------|
   |   20MB    |       (4) 1M x 9       |      (4) 4M x 9       |
   |-----------+------------------------+-----------------------|
   |   32MB    |       (4) 4M x 9       |      (4) 4M x 9       |
   |-----------+------------------------+-----------------------|
   |   64MB    |      (4) 16M x 9       |         NONE          |
   |-----------+------------------------+-----------------------|
   |   128MB   |      (4) 16M x 9       |      (4) 16M x 9      |
   +------------------------------------------------------------+

   +------------------------------------------------------------+
   |    CPU SPEED CONFIGURATION FOR CH9001 SYSTEM CLOCK CHIP    |
   |------------------------------------------------------------|
   |         CPU Speed          |              JP9              |
   |----------------------------+-------------------------------|
   |     33/66(internal)MHz     |       pins 1 & 4 closed       |
   |----------------------------+-------------------------------|
   |     25/50(internal)MHz     |       pins 3 & 6 closed       |
   |----------------------------+-------------------------------|
   |           40MHz            |  pins 1 & 2 and 4 & 5 closed  |
   |----------------------------+-------------------------------|
   |           50MHz            |       pins 2 & 5 closed       |
   +------------------------------------------------------------+

   +------------------------------------------------------------+
   |                     SRAM CONFIGURATION                     |
   |------------------------------------------------------------|
   |  Size   |  Cache SRAM   |   Location   | Jumpers JP6 & JP7 |
   |---------+---------------+--------------+-------------------|
   |  128KB  |  (4) 32K x 8  |    Bank 0    | pins 2 & 3 closed |
   |---------+---------------+--------------+-------------------|
   |  256KB  |  (8) 32K x 8  | Banks 0 & 1  | pins 1 & 2 closed |
   +------------------------------------------------------------+