5179734 Threaded interpretive data processor 395/800 5179733 Wristwatch band with radio antenna 455/344 5179732 Mixer having balun mounted to a support block 455/330 5179731 Frequency conversion circuit 455/291 5179730 Selectivity system for a direct conversion receiver 455/266 5179729 Tuner station selecting apparatus 455/260 5179728 Spurious product and local oscillator radiation suppression system for use in superheterodyne radio receivers 455/183.1 5179727 Automatic adjusting circuit for an analog filter 455/182.3 5179726 Automatic tuning method and apparatus of double conversion tuner 455/180.4 5179725 Voltage controlled oscillator with correction of tuning curve non-linearities 455/164.2 5179724 Conserving power in hand held mobile telephones during a receiving mode of operation 455/76 5179723 Mobile telephone device for carrying out an aging operation without interference with a mobile telephone system 455/67.4 5179722 Method for determining multiple interference in a mobile radio system 455/33.1 5179721 Method for inter operation of a cellular communication system and a trunking communication system 455/33.1 5179720 Method and apparatus for extended coverage of a trunked radio communications system 455/16 5179719 Programmable signal reception system 455/4.1 5179718 Method of filing having a directed relationship through defining a staple relationship within the context of a folder document 395/800 5179717 Sorting circuit using first and last buffer memories addressed by reference axis data and chain buffer memory addressed by datum number of the first and last buffer memories 395/800 5179716 Programmable expandable controller with flexible I/O 395/800 5179715 Multiprocessor computer system with process execution allocated by process managers in a ring configuration 395/800 5179714 Parallel bit serial data processor 395/800 5179713 Apparatus for allowing external control of local bus read using zero wait stats input of combined I/O and DRAM controller 395/800 5179712 Rank cell array structure for sorting by each cell comparing the cell value to previous cell value, next cell value, in value and out value 395/800 5179711 Minimum identical consecutive run length data units compression method by searching consecutive data pair comparison results stored in a string 395/775 5179710 Interface for amplifying logic signal from a signal line having a predetermined logic state to supply power to peripheral device 395/750 5179709 Look ahead bus transfer request 395/725 5179708 System inhibiting message delivery to destination process until priority of process excuting on distination processor is no higher than priority of sending process 395/725 5179707 Interrupt processing allocation in a multiprocessor system 395/725 5179706 Method and apparatus for preventing bus contention problems between two processors 395/725 5179705 Asynchronous arbiter state machine for arbitrating between operating devices requesting access to a shared resource 395/725 5179704 Method and apparatus for generating disk array interrupt signals 395/725 5179703 Dynamically adaptive environment for computer programs 395/700 5179702 System and method for controlling a highly parallel multiprocessor using an anarchy based scheduler for parallel execution thread scheduling 395/650 5179701 Organizing a process database having different types of data blocks by maintaining separate tables for generic routines and for block-type specific routines 395/600 5179700 User interface customization apparatus 395/650 5179699 Partitioning of sorted lists for multiprocessors sort and merge 395/650 5179698 System for transforming user data in accordance with an algorithm defined by design data and for evaluating the transformed data against logical criteria 395/600 5179697 System for deleting prioritized data stored in second memory after all the data has been successfully transferred to first memory 395/575 5179696 Generator detecting internal and external ready signals for generating a bus cycle end signal for microprocessor debugging operation 395/575 5179695 Problem analysis of a node computer with assistance from a central site 395/575 5179694 Data processor in which external sync signal may be selectively inhibited 395/550 5179693 System for controlling operation of processor by adjusting duty cycle of performance control pulse based upon target performance value 395/550 5179692 Emulation device for driving a LCD with signals formatted for a CRT display 395/500 5179691 N-byte stack-oriented CPU using a byte-selecting control for enhancing a dual-operation with an M-byte instruction word user program where M